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 Ordering number : ENA0004A
LV8042LG
Overview Features
Bi-CMOS IC
For Digital Still Cameras
7-Channel Single-Chip Motor Driver ICs
The LV8042LG is Motor driver 7ch single-chip for DSC.
* Micro-step driven stepping motor driverx2 * PWM driven forward/reverse motor driver (changeover to the micro-step driving stepping motor driver 1ch possible) x 2 * PWM driven forward/reverse motor driverx2 * Constant-current forward/reverse motor driver x 1 * Two-phase, single-two phase full torque, single-two phase, 4W1-2, phase excitation drive changeover possible (1/2/3/4ch) * Progress of micro-step driven excitation steps by clock signal input only (1/2/3/4ch) * Holding electrification current changeover in four steps possible by serial data (1/2/3/4ch) * Constant-current control chopping frequency variable with external resistor (1/2/3/4ch) * 8-bit wire serial data control
Actuator application example
Shutter Application 1 Application 2 Application 3 Constant current /VCM Constant current /VCM Constant current /VCM Iris Saturation /STM or VCM Saturation /STM or VCM Micro-step /STM Focus Micro-step /STM Micro-step /STM Micro-step /STM Zoom Micro-step /STM Saturation /STM or DCM Saturation /STM or DCM
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
41107 TI IM B8-8935,8943 No.A0004-1/29
LV8042LG
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Supply voltage 1 Supply voltage 2 Output peak current Output continuous current Allowable power dissipation 1 Allowable power dissipation 2 Operating temperature Storage temperature Symbol VM max VCC max IOpeak IO max Pd max1 Pd max2 Topr Tstg 1ch/2ch/3ch/4ch/5ch/6ch/7ch Pulse width<10ms, ty20% 1ch/2ch/3ch/4ch/5ch/6ch/7ch Independent IC Mounted on a specified board * Conditions Ratings 6 6 600 400 0.32 1.4 -20 to +85 -55 to +150 Unit V V mA mA W W C C
Note *1: Mounted on a specified board: 40mmx50mmx0.8mm glass epoxy (four-layer substrate) Allowable Operating Range at Ta = 25C
Parameter Supply voltage range 1 Supply voltage range 2 Logic input voltage Chopping frequency Clock frequency PWM frequency Symbol VM VCC VIN fchop fCLK fPWM 1ch, 2ch, 3ch, 4ch CLK12, CLK34 PWM3, PWM4, PWM5, PWM6 Conditions Ratings 2 to 5.5 2.7 to 5.5 0 to VCC+0.3 50 to 200 to 64 to 100 Unit V V V kHz kHz kHz
Electrical Characteristics at Ta = 25C, VM = 5V, VCC = 3.3V
Parameter Standby current drain Operating current drain 1 Operating current drain 2 VCC low-voltage cutting voltage Low-voltage hysteresis voltage VG reference voltage Charge pump boost voltage Charge pump rise time Charge pump oscillation frequency Thermal shutdown temperature Thermal hysteresis width Stepping motor driver (1ch/2ch) Output ON resistance Ronu1 Rond1 Output leak current Diode forward voltage Logic pin input current IOleak1 VD1 IINL1 IINH1 Logic input "H" level voltage Logic input "L" level voltage VINH1 VINL1 ID=-400mA VIN=0V (ST, CLK12) VIN=3.3V (ST, CLK12) ST, CLK12 ST, CLK12 20 2.5 1.0 33 0.6 0.9 IO=400mA, upper IO=400mA, lower 0.6 0.6 0.7 0.7 1.0 1.2 1.0 50 A V A A V V Symbol Istn IM ICC VthVCC VthHIS VGL VGH tONG Fchg TSD TSD C (VGH)=0.1F R=20k Design guarantee* Design guarantee* 100 150 20 ST="L" ST="H", PWM="H", IN72="H" no load ST="H", PWM="H", IN72="H" no load 2.1 100 4.4 VM+3.5 50 4.0 2.35 150 4.7 VM+4 0.1 125 160 30 Conditions min Ratings typ max 1.0 100 5.0 2.6 200 5.0 VM+4.5 0.2 150 180 40 A A mA V mV V V ms kHz C C Unit
Note: * Design target value. These items are not tested.
Continued on next page.
No.A0004-2/29
LV8042LG
Continued from preceding page.
Parameter Current selection reference voltage level 4W1-2 phases Symbol Step 16 (1ch comparing level during initialization) Step 15 (initialization +1) Step 14 (initialization +2) Step 13 (initialization +3) Step 12 (initialization +4) Step 11 (initialization +5) Step 10 (initialization +6) Step 9 (initialization +7) Step 8 (initialization +8) Step 7 (initialization +9) Step 6 (initialization +10) Step 5 (initialization +11) Step 4 (initialization +12) Step 3 (initialization +13) Step 2 (initialization +14) Step 1 (initialization +15) 1-2 phases Step 16 (1ch comparing level during initialization) Step 8 (initialization +1) 1-2 phases full torque Step 16 (1ch comparing level during initialization) Step 8 (initialization +1) 2 phase Chopping frequency Current setting reference voltage Fchop1 VSEN11 VSEN12 VSEN13 VSEN14 PWM drive/stepping motor driver (3ch/4ch) Output ON resistance Ronu2 Rond2 Output leak current Diode forward voltage Logic input current IOleak2 VD2 IINL2 IINH2 Logic input "H" level voltage Logic input "L" level voltage VINH2 VINL2 ID=-400mA VIN=0V (PWM3, PWM4) VIN=3.3V (PWM3, PWM4) PWM3, PWM4 PWM3, PWM4 20 2.5 1.0 33 0.6 0.9 IO=400mA, upper IO=400mA, lower 0.6 0.6 0.7 0.7 1.0 1.2 1.0 50 A V A A V V Step 8 R=20k (D3, D2)=(0, 0) (D3, D2)=(0, 1) (D3, D2)=(1, 0) (D3, D2)=(1, 1) Conditions min 0.185 0.185 0.185 0.176 0.170 0.162 0.154 0.146 0.129 0.113 0.097 0.079 0.062 0.044 0.024 0.006 0.185 0.129 0.185 0.185 0.185 100 0.185 0.119 0.085 0.051 Ratings typ 0.200 0.200 0.200 0.191 0.185 0.177 0.169 0.161 0.144 0.128 0.112 0.094 0.077 0.059 0.039 0.021 0.200 0.144 0.200 0.200 0.200 125 0.200 0.134 0.100 0.066 max 0.215 0.215 0.215 0.206 0.200 0.192 0.184 0.176 0.159 0.143 0.127 0.109 0.092 0.074 0.054 0.036 0.215 0.159 0.215 0.215 0.215 150 0.215 0.149 0.115 0.081 V V V V V V V V V V V V V V V V V V V V V kHz V V V V Unit
Continued on next page.
No.A0004-3/29
LV8042LG
Continued from preceding page.
Parameter Current selection reference voltage level 4W1-2 phases Symbol Step 16 (3ch comparing level during initialization) Step 15 (initialization +1) Step 14 (initialization +2) Step 13 (initialization +3) Step 12 (initialization +4) Step 11 (initialization +5) Step 10 (initialization +6) Step 9 (initialization +7) Step 8 (initialization +8) Step 7 (initialization +9) Step 6 (initialization +10) Step 5 (initialization +11) Step 4 (initialization +12) Step 3 (initialization +13) Step 2 (initialization +14) Step 1 (initialization +15) 1-2 phases Step 16 (3ch comparing level during initialization) Step 8 (initialization +1) 1-2 phases full torque Step 16 (3ch comparing level during initialization) Step 8 (initialization +1) 2 phase Chopping frequency Current setting reference voltage Fchop2 VSEN21 VSEN22 VSEN23 VSEN24 PWM driven forward/reverse motor driver (5ch/6ch) Output ON resistance Ronu3 Rond3 Output leak current Diode forward voltage Logic pin input current IOleak3 VD3 IINL3 IINH3 Logic input "H" level voltage Logic input "L" level voltage VINH3 VINL3 ID=-400mA VIN=0V (PWM5, PWM6) VIN=3.3V (PWM5, PWM6) PWM5, PWM6 PWM5, PWM6 20 2.5 1.0 33 0.6 0.9 IO=400mA, upper IO=400mA, lower 0.6 0.6 0.7 0.7 1.0 1.2 1.0 50 A V A A V V Step 8 R=20k (D5, D4)=(0, 0) (D5, D4)=(0, 1) (D5, D4)=(1, 0) (D5, D4)=(1, 1) Conditions min 0.185 0.185 0.185 0.176 0.170 0.162 0.154 0.146 0.129 0.113 0.097 0.079 0.062 0.044 0.024 0.006 0.185 0.129 0.185 0.185 0.185 100 0.185 0.119 0.085 0.051 Ratings typ 0.200 0.200 0.200 0.191 0.185 0.177 0.169 0.161 0.144 0.128 0.112 0.094 0.077 0.059 0.039 0.021 0.200 0.144 0.200 0.200 0.200 125 0.200 0.134 0.100 0.066 max 0.215 0.215 0.215 0.206 0.200 0.192 0.184 0.176 0.159 0.143 0.127 0.109 0.092 0.074 0.054 0.036 0.215 0.159 0.215 0.215 0.215 150 0.215 0.149 0.115 0.081 V V V V V V V V V V V V V V V V V V V V V kHz V V V V Unit
Constant current forward/reverse motor driver (7ch) Output ON resistance Ronu4 Rond4 Output leak current Diode forward voltage Logic pin input current IOleak4 VD4 IINL4 IINH4 Logic input "H" level voltage Logic input "L" level voltage Output constant current VREF7 output voltage LIM7 input current VINH4 VINL4 IOUT7 VREF7 ILIM7 ID=-400mA VIN=0V (IN71, IN72) VIN=3.3V (IN71, IN72) IN71, IN72 IN71, IN72 Rload=3, SEN7=0.5, LIM7=0.2V (D7, D6)=(0, 0) LIM7=0V 384 0.190 400 0.200 20 2.5 1.0 416 0.210 1.0 33 0.6 0.9 IO=400mA, upper IO=400mA, lower 0.6 0.6 0.7 0.7 1.0 1.2 1.0 50 A V A A V V mA V A
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No.A0004-4/29
LV8042LG
Continued from preceding page.
Parameter FC7 rapid charge current FC7 steady charge current FC7 steady discharge current Current setting reference voltage Symbol Irafc7 Ichfc7 Idisfc7 VSEN41 VSEN42 VSEN43 VSEN44 Serial data transmission pin Logic pin input current IINL5 IINH5 Logic input "H" level voltage Logic input "L" level voltage Minimum SCLK "H" pulse width Minimum SCLK "L" pulse width STB specified time Minimum STB pulse width Data setup time Data hold time Maximum SCLK frequency VINH5 VINL5 Tsch Tscl Tlat Tlatw Tds Tdh Fclk VIN=0V (SCLK, DATA, STB) VIN=3.3V (SCLK, DATA, STB) SCLK, DATA, STB SCLK, DATA, STB 0.125 0.125 0.125 0.125 0.125 0.125 4 20 2.5 1.0 33 1.0 50 A A V V s s s s s s MHz (D7, D6)=(0, 0) (D7, D6)=(0, 1) (D7, D6)=(1, 0) (D7, D6)=(1, 1) Conditions min 300 5 5 0.190 0.124 0.090 0.056 Ratings typ 450 10 10 0.200 0.134 0.100 0.066 max 600 15 15 0.210 0.144 0.110 0.076 A A A V V V V Unit
Fclk Tsch Tscl SCLK Tds Tdh DATA D0 D1 D2 D6 D7 Tlat STB Tlatw
No.A0004-5/29
LV8042LG
Package Dimensions
unit : mm (typ) 3326
TOP VIEW 6.0 0.3 BOTTOM VIEW 0.5
8 9 10 11 1 2 3 4 56 7
L K J H G F ED C BA
6.0
0.3
0.5 (0.45)
(0.45)
0.4
0.0NOM
0.85MAX
SIDE VIEW
SANYO : FLGA68K(6.0X6.0)
1.6
Pd max - Ta
Mounted on a specified board: 40mmx50mmx0.8mm, glass epoxy (four-layer substrate)
Allowable power dissipation, Pd max - W
1.4 1.2 1.0 0.8
0.73 0.6 0.4 0.32 0.2 0 -20
Independent IC
0.17 0 20 40 60 80 100 ILV00255
Ambient temperature, Ta - C
Pin Functions
Pin No 5 2 4 3 6 8 7 68 67 66 29 27 Pin Name VM12 OUT1A OUT1B SEN1 OUT2A OUT2B SEN2 PGND12 CLK12 MO SCLK DATA STP 1ch/2ch Motor power connection pin STP 1ch OUTA Output pin STP 1ch OUTB Output pin STP 1ch Current sensing resistor connection pin STP 2ch OUTA Output pin STP 2ch OUTB Output pin STP 2ch Current sensing resistor connection pin STP 1ch/2ch Power GND STP Clock signal input pin STP Position detection monitor pin Serial data transmission CLK input pin Serial data input pin Description
0.5
0.5
Continued on next page.
No.A0004-6/29
LV8042LG
Continued from preceding page.
Pin No 28 32 13 10 12 11 14 17 15 20 21 22 39 36 38 33 41 44 34 43 49 58 47 46 48 64 65 45 62 60 51 52 54 56 53 57 24 30 26 Pin Name STB R VM34 OUT3A OUT3B SEN3 OUT4A OUT4B SEN4 PGND34 PWM3/CLK34 PWM4 VM56 OUT5A OUT5B PWM5 OUT6A OUT6B PWM6 PGND56 VM7 FC7 SEN7 OUT7A OUT7B IN71 IN72 PGND7 VREF7 LIM7 CPL1 CPL2 CPH1 CPH2 VGL VGH ST VCC GND Serial data latch pulse input pin Oscillation frequency setting resistor connection pin PWM/STP 3ch/4ch Motor power connection pin PWM 3ch OUTA Output pin STP 3ch OUTA Output pin PWM 3ch OUTB Output pin STP 3ch OUTB Output pin STP 3ch Current sensing resistor connection pin PWM 4ch OUTA Output pin STP 4ch OUTA Output pin PWM 4ch OUTB Output pin STP 4ch OUTB Output pin STP 4ch Current sensing resistor connection pin PWM/STP 3ch/4ch Power GND PWM 3ch PWM Signal input pin STP Clock signal input pin PWM 4ch PWM Signal input pin PWM 5ch/6ch Motor power connection pin PWM 5ch OUTA Output pin PWM 5ch OUTB Output pin PWM 5ch PWM Signal input pin PWM 6ch OUTA Output pin PWM 6ch OUTB Output pin PWM 6ch PWM Signal input pin PWM 5ch/6ch Power GND Constant-current 7ch motor power connection pin Constant-current 7ch phase compensation capacitor connection pin Constant-current 7ch current sensing resistor connection pin Constant-current 7ch OUTA output pin Constant-current 7ch OUTB output pin Constant-current 7ch 1 logic input pin Constant-current 7ch 2 logic input pin Constant-current 7ch power GND Constant-current 7ch current setting reference voltage output Constant-current 7ch constant-current setting pin Charge pump capacitor connection pin Charge pump capacitor connection pin Charge pump capacitor connection pin Charge pump capacitor connection pin Lower DMOS gate voltage capacitor connection pin Upper DMOS gate voltage capacitor connection pin Chip enable pin Logic power connection pin Signal GND Description
No.A0004-7/29
LV8042LG
Pin Assignment
L K J H G F 9 (NC) E D C B 1 (NC) A 1
17 15 13 11 OUT4B SEN4 VM34 SEN3 18 (NC)
7 5 3 SEN2 VM12 SEN1
67 68 16 14 12 10 8 6 4 2 (NC) OUT4A OUT3B OUT3A OUT2B OUT2A OUT1B OUT1A CLK12 PGND12 65 IN72 63 (NC) 61 (NC) 66 MO 64 IN71 62 VREF 60 LIM7 58 FC7 56 CPH2 54 CPH1 52 CPL2
2
20 19 PGND34 (NC) 21 22 PWM3/ PWM4 CLK34 24 ST 26 GND 28 STB 30 VCC 32 R 23 (NC) 25 (NC) 27 DATA 29 SCLK 31 (NC)
3
4
5
LV8042LG
59 (NC) 57 VGH 55 (NC) 53 VGL
6
7
8
9
40 38 36 34 33 PWM6 PWM5 OUT5A OUT5B (NC) 35 (NC) 37 (NC)
50 48 46 44 42 (NC) OUT6B OUT7A OUT7B (NC) 49 VM7 51 CPL1
10
47 45 43 41 39 VM56 OUT6A PGND PGND SEN7
11 Top View
A 1
B 1 (NC)
C
D
E
F 9 (NC)
G
H
J
K
L
3 5 7 SEN1 VM12 SEN2
11 13 15 17 SEN3 VM34 SEN4 OUT4B 18 (NC)
2
68 67 2 4 6 8 10 12 14 16 PGND12 CLK12 OUT1A OUT1B OUT2A OUT2B OUT3A OUT3B OUT4A (NC) 66 MO 64 IN71 65 IN72 63 (NC)
3
19 20 (NC) PGND34 21 22 PWM3/ CLK34 PWM4 23 (NC) 24 ST 26 GND 28 STB 30 VCC 32 R
4
5
62 61 VREF7 (NC) 60 LIM7 58 FC7 56 CPH2 54 CPH1 52 CPL2 59 (NC) 57 VGH 55 (NC) 53 VGL 44 46 48 50 42 (NC) OUT7B OUT7A OUT6B (NC) 51 CPL1 49 VM7
6
LV8042LG
25 (NC) 27 DATA 29 SCLK 31 (NC)
7
8
9
10
33 34 36 38 40 (NC) OUT5B OUT5A PWM5 PWM6 37 (NC) 35 (NC) Bottom view
11
45 47 39 43 41 SEN7 PGND7 PGND56 OUT6A VM56
(NC): No Connect
No.A0004-8/29
PWM3/CLK34
OUT1A
OUT1B
OUT2A
OUT2B
OUT3B
OUT3B
OUT4B
CLK12
PWM4
DATA
SEN1
SEN2
SCLK
SEN3
OUT4B
VM12
VM34
TSD VGH VGL PGND12 Bridge driver 1ch Bridge driver 2ch Output control logic 6 2
Monitor select LVS
TSD LVS 6
Serial-parallel conversion circuit
SEN4
STB
MO
R
1 2
Output control logic
VGH
Bridge driver 3ch
Bridge driver 4ch
VGL
PGND34
LV8042LG
Current select circuit ST
OSC
Current select circuit
Reference voltage circuit
VM7 VCC VCC TSD TSD GND LVS LVS VGH VGL VGH VGL Charge pump circuit Bridge driver 5ch 4 2
Constant-current select circuit
VGH TSD LVS Bridge driver 6ch Output control logic VGL
VREF7
TSD LVS
LIM7
Bridge driver 7ch VGH VGL
Output control logic
Block Diagram
CPH1
CPL1
CPL2
CPH2
VGL
VGH
VM56
PGND7
IN71
PGND56
PWM5
OUT5A
OUT5B
PWM6
SEN7
OUT6A
OUT6B
OUT7A
OUT7B
FC7
IN72
No.A0004-9/29
ILV00205
LV8042LG
Serial Data Input Specification
Register (D1, D0): Selection of Data Transmission Destination
D1 0 0 1 1 D0 0 1 0 1 Mode STP reference voltage setting/Monitor output setting/3ch 4ch drive mode setting 1ch 2ch (STP) setting 3ch 4ch (PWM/STP) setting 5ch 6ch(PWM) setting /7ch (constant current) reference voltage setting
Setting (D1, D0) of serial data as shown in the table above enables selection of the register for status setting of each motor driver. STP Reference Voltage Setting/Monitor Output Setting/3ch 4ch Drive Mode Setting
Register No. D0 D1 D2 D3 D4 D5 D6 D7 Data 0 0 0 or1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 Nomenclature RG_SELECT 1 RG_SELECT 2 VSEN1_SELECT 1 VSEN1_SELECT 2 VSEN2_SELECT 1 VSEN2_SELECT 2 MO_SELECT PWM/MICRO Functions Register select 1 Register select 2 1ch 2ch reference voltage select 1 1ch 2ch reference voltage select 2 3ch 4ch reference voltage select 1 3ch 4ch reference voltage select 2 Monitor output channel select 3ch 4ch drive mode setting
1ch 2ch (STP) Setting
Register No. D0 D1 D2 D3 D4 D5 D6 D7 Data 1 0 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 Nomenclature RG_SELECT 1 RG_SELECT 2 F/R 1 MS 11 MS 12 HOLD 1 RESET 1 OUT ENABLE 1 Functions Register select 1 Register select 2 Forward/reverse setting Micro-step select 1 Micro-step select 2 Step hold setting Logic reset Output enable 1ch/2ch (STP) Channel
3ch 4ch (PWM/STP) Setting
Nomenclature Register No Data 3ch 4ch drive setting (D7) "0" D0 D1 D2 D3 D4 D5 D6 D7 0 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 RG_SELECT 1 RG_SELECT 2 F/R 3 DECAY 3 F/R 4 DECAY 4 (DUMMY) (DUMMY) F/R 2 MS 21 MS 22 HOLD 2 RESET 2 OUT ENABLE 2 "1" Register select 1 Register select 2 Forward/reverse setting Current attenuation mode setting Forward/reverse setting Current attenuation mode setting (Dummy data) (Dummy data) Forward/reverse setting Micro-step select 1 Micro-step select 2 Step hold setting Logic reset Output enable 3ch PWM 4ch PWM 3ch/4ch (STP) PWM mode Functions Channel STP mode
No.A0004-10/29
LV8042LG
5ch 6ch (PWM) Setting/7ch (constant-current) Reference Voltage Setting
Register No. D0 D1 D2 D3 D4 D5 D6 D7 Data 1 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 Nomenclature RG_SELECT 1 RG_SELECT 2 F/R5 DECAY5 F/R6 DECAY6 VSEN7_SELECT 1 VSEN7_SELECT 1 Functions Register select 1 Register select 1 Forward/reverse setting Current attenuation mode setting Forward/reverse setting Current attenuation mode setting 7ch constant-current reference voltage select 1 7ch constant-current reference voltage select 2 5ch PWM 6ch PWM 7ch Constant current Channel
Serial Data Input Setting
ST
DATA
D0
D1
D2
D3
D4
D5
D6
D7
SCLK
STB
Status setting data latched
Input DATA and SCLK after setting of STB = "L". SCLK is not accepted in the state with STB = "H". Input DATA from D0 to D7 in this order. CLK performs data transmission at the rise edge and latches all data at rise of STB after transmission of all data. All of serial data is reset to "0" with ST = "L". and at the voltage to cut VCC low voltage. Timing to Reflect Serial Data to the Output * PWM mode (Applicable to 3, 4, 5, and 6ch) Type 1: FR and DECAY settings during PWM drive are reflected simultaneously with the STB signal of data latching. * STP mode (Applicable to 1, 2, 3, and 4ch) Type 1: HOLD, RESET, CUT ENABLE settings and reference voltage setting are reflected simultaneously with the STB signal of data latching. Type 2: Forward/reverse (F/R) and excitation mode (MS) settings made during STEP setting are reflected at rise of the next clock of data latching.
CLK
CLK
STB Data latch timing STB timing Type 1
STB
Data latch timing Type 2 Example: Two-phase excitation
Reflect at rise Example: phases excitation
No.A0004-11/29
LV8042LG
Stepping Motor Driver (1ch/2ch)
CLK Function
Input ST L H H CLK12 * Standby mode Excitation step feed Operating Excitation step hold Stop Operation mode Charge pump circuit
1ch 2ch (STP) Status Setting Serial Data: (D1, D0=0, 1)
D7 (OE) * * * * * * * * * * 0 1 D6 (RST) * * * * * * * * 0 1 * * D5 (HOLD) * * * * * * 0 1 * * * * D4 (MS2) * * 0 0 1 1 * * * * * * D3 (MS1) * * 0 1 0 1 * * * * * * D2 (F/R) 0 1 * * * * * * * * * * Operation mode CW (forward) CCW (reverse) 2 phase excitation drive 1-2 phases full torque excitation drive 1-2 phases excitation drive 4W1-2 phases excitation drive Step hold cancel Step hold Counter reset (Excitation at initial position) Counter reset cancel Output high impedance Output operation state
*: Don't Care
1ch 2ch Reference Voltage Setting Serial Data: (D1, D0=0, 0)
D3 (VSEN1_SELECT2) 0 0 1 1 D2 (VSEN1_SELECT1) 0 1 0 1 Current setting reference voltage (at 100%) 0.2V 0.134V 0.1V 0.066V
The reference voltage to set the output current can be changed over in four stages by the serial data. This is effective for power saving during hold power application of the motor. Set Current Calculation Method IOUT = (reference voltage x set current ratio) /SEN resistance As the reference voltage is variable (0.2V, 0.134V, 0.1V, 0.066V) by the serial data, the output current can be set from the reference voltage and SEN resistance. (Example) The output current as shown below flows when the reference voltage is 0.2V, the set current ratio is 100%, and the SEN resistance is 1. IOUT = 0.2V x 100%/1 = 200mA
No.A0004-12/29
LV8042LG
Monitor Output Channel Setting Serial Data: (D1, D0=0, 0)
MO Pin (Pin 66)
D6 (MO_SELECT) 0 1 Monitor output channel 1ch 2ch STP 3ch 4ch STP Monitor output state "L" output at the initialization position of STP
Initial Excitation Position (Monitor output position)
Excitation mode 2 phase 1-2 phases full torque 1-2 phases 4W1-2 phases 1ch 100% 100% 100% 100% 2ch -100% 0% 0% 0%
OUTPUT ENABLE (D7), RESET (D6) Operation Description
Power save mode Initial mode
OE(D7) CLK MO
RST(D6) CLK MO
1ch output
1ch output
0% 2ch output 2ch output
0%
Output with high impedance
Initial state
With OE (D7) data = "0", the output is turned OFF and becomes high impedance at rise of STB. As the internal logic circuit is operating, however, the position number proceeds while CLK is input. Therefore, with OE (D7) data returned to "1", the level along the position number proceeding with the CLK input is output. With RST (D6)= "0", the output is initialized at rise of STB and the MO output becomes Low. With RST (D6)= "1" subsequently, the position number proceeds at the next CLK input.
No.A0004-13/29
LV8042LG
HOLD (D5) Operation Description
logic
Internal CLK logic
(External) CLK
Internal logic
HOLD(D5)
Step hold (1)
Step hold cancel
Step hold (2)
Step hold cancel
HOLD (D5) (External)CLK Held at "L" Internal CLK Held at "H"
1ch output
0% 2ch output
Hold state
Hold state
With HOLD (D5) data = "1", the external CLK data is held as it is in the internal CLK. In the step hold (1) timing as shown above, the (external) CLK is at "L", so that the internal CLK is held at "L." In the step hold (2) timing, the (external) CLK is at "H", so that the internal CLK is held at "H." With HOLD (D5) data = "0", the internal CLK is synchronized with the normal (external) CLK. The output holds the status in the timing of input of step hold. After canceling of step hold, the position No. proceeds in the timing of CLK (rise). As long as the hold status continues, the position No. does not proceed even when (external) CLK is input.
No.A0004-14/29
LV8042LG
Output Current Vector Locus (one step is normalized to 90 degree)
16 100 15 14 13 12 11 10 80
1ch(3ch) phase current ratio (%)
8(2 phase) (1-2 phases full torque)
9 8 7
60 6 5 40 4 3 20 2 1 0 0 20 40 60 80 100
0
2ch(4ch) phase current ratio (%)
Set Current Ratio in Each Excitation Mode
STEP 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 4W1-2 phase (%) 1ch (3ch) 0 8.69 17.39 26.08 34.78 43.48 52.17 60.87 69.56 78.26 82.61 86.95 91.3 95.65 100 100 100 2ch (4ch) 100 100 100 95.65 91.3 86.95 82.61 78.26 69.56 60.87 52.17 43.48 34.78 26.08 17.39 8.69 0 100 0 100 0 69.56 69.56 100 100 100 100 1-2 phases (%) 1ch (3ch) 0 2ch (4ch) 100 1-2 phases full torque (%) 1ch (3ch) 0 2ch (4ch) 100 2 phase (%) 1ch (3ch) 2ch (4ch)
No.A0004-15/29
LV8042LG
2 Phase Excitation (D4="0", D3="0", D2="0": CW mode)
CLK
MO (%) 100 I1 0 -100 (%) 100 I2 0 -100
1-2 Phases Full Torque (D4="0", D3="1", D2="0": CW mode)
CLK
MO (%) 100 I1 0 -100 (%) 100 I2 0 -100
1-2 Phases Excitation (D4="1", D3="0", D2="0": CW mode)
CLK
MO (%) 100 I1 0 -100 (%) 100 I2 0 -100
No.A0004-16/29
LV8042LG
4W1-2 Phases Excitation (D4="1", D3="1", D2="0": CW mode)
CLK
MO
100 80 60 40 20
I1(%)
0 -20 -40 -60 -80 -100 0 10 20 30 40 50 60
100 80 60 40 20
I2(%)
0 -20 -40 -60 -80 -100 0 10 20 30 40 50 60
No.A0004-17/29
LV8042LG
Basic Operation of Set Current Step Changeover and Forward/Reverse Changeover (D2 (F/R))
(16) 100 (15) (14) (13) (12) (11) (10) (9) 80 (8) (7) 60 (6) (5) 40 (4) (3) 20 (2) (1) 0 0 20 40 60 80 100 8(2 phase) (1-2 phases full torque) (8)'
0
D2(F/R)
CW mode
CCW mode
CW mode
CLK
Position No
(8)
(7)
(6)
(5)
(4)
(3)
(4)
(5)
(6)
(5)
1ch output
2ch output
DA converter in IC proceeds by one bit at rise of input clock pulse. D2 (F/R) data causes changeover of CW and CCW modes; the position No. decreases in the CW mode and increases in the CCW mode. When viewed from the 1ch current, the 2ch current is delayed by 90 degree in phase in the CW mode. When viewed from the 1ch current, the 2ch current is delayed by 90 degree in the CCW mode.
No.A0004-18/29
LV8042LG
Basic Operation of Excitation Mode Changeover (D3, D4 (MS1, MS2)) CW Mode
D3(MS1) D4(MS2)
CLK
Position No
(16) (15)
(14) (13) (8)
0
-(8)
-(9)
-(10) -(11) -(12) -(8)
-(16) -(8)
0
(8)
(8)'
(8)'
(7)
(6)
1ch output
4W1-2 phase
1-2 phase
4W1-2 phase
1-2 phase
2 phase
4W1-2 phase
When the excitation mode is changed over during power application to the motor, the motor operates in the following sequence. (CW mode)
Before excitation mode changeover Excitation mode Position No. (16) (15) to (9) 4W1-2 phase (8) (7) to (1) 0 (16) 1-2 phases (8) 0 (16) 1-2 phases full torque 2 phase (8)' 0 (8)' (15) (7) -(1) (15) (7) -(1) (7) (8) 0 -(8) 0 0 4W1-2 phase Step position after excitation mode changeover 1-2 phases (8) (8) 0 (8) -(8) 1-2 phases full torque (8)' (8)' 0 (8)' -(8)' (8)' 0 -(8)' 2 phase (8)' (8)' (8)' (8)' -(8)' (8)' (8)' -(8)' (8)' (8)' -(8)'
* The symbol "-" such as -(8) in the table indicates that the phase has been reversed.
No.A0004-19/29
LV8042LG
Current Control Operation Specification
Sine wave increasing direction
CLK
Set current Coil current Set current
fchop
Current mode CHARGE
SLOW
FAST
CHARGE
SLOW FAST
Sine wave decreasing direction In each current mode, the motor operates in the following sequence.
CLK
Set current Coil current
Set current
fchop
Current mode
CHARGE
SLOW
FAST
CHARGE
FAST
CHARGE
SLOW
* The motor enters the CHARGE mode at rise of chopping oscillation. (Regardless of the magnitude of the coil current (ICOIL) and set current (IREF), the section in which the CHARGE mode is forced (hereinafter called the "forced CHARGE" mode) exists for 1/8 of one chopping cycle.) * The coil current (ICOIL) is compared with the set current (IREF) in the CHARGE mode. In the case of ICOILNo.A0004-20/29
LV8042LG
Output stage transistor function
The OUTA OUTB direction is assumed to be for charge (current increasing direction).
VM VM VM
ON U1 OUTA L1 OFF
OFF U2 OUTB L2 ON
OFF U1 OUTA L1 ON
OFF U2 OUTB L2 ON
OFF U1 OUTA L1 ON
OFF U2 OUTB L2 ON
(CHARGE) Chopping frequency (fchop) setting method
(SLOW)
(FAST)
This is the frequency for chopping, which is determined by the external resistor for constant-current control. The chopping frequency set by the resistance connected to R pin (pin 32) is shown below.
300
250
Chopping frequency, f - kHz
200
150
100
50
0 0 10 20 30 40 50 60 70 80 90 100
R resistance - k
ILV00204
The recommended chopping frequency ranges from 50 to 200kHz.
No.A0004-21/29
LV8042LG
PWM Drive/Stepping Motor Driver (3ch/4ch) 3ch 4ch drive motor setting serial data: (D1, D0=0, 0)
D7 (PWM/MICRO) 0 1 Operation mode Pin 21 PWM2 system Micro-step driven STP1 system PWM3 CLK34 Pin function Pin 22 PWM4 Not used
By setting D7 (PWM/MICRO) data as shown in the table above, changeover to two systems of direct PWM drive H-bridge driver and single system of micro-step driven stepping motor driver can be made. PWM Drive Mode (3ch 4ch drive mode setting D7="0") 3ch (PWM) truth table: (D1, D0=1, 0)
Input ST L H H H H PWM3 * H H L L D2 * 0 1 * * D3 * * * 0 1 OUT3A OFF HNote L OFF L Output OUT3B OFF L HNote OFF L Standby CW(Forward) CCW(Reverse) FAST DECAY(output OFF) SLOW DECAY(brake) Operating Stop Operation mode Charge pump circuit
4ch (PWM) truth table: (D1, D0=1, 0)
Input ST L H H H H PWM4 * H H L L D4 * 0 1 * * D5 * * * 0 1 OUT4A OFF H
Note
Output OUT4B OFF L HNote OFF L
Operation mode Standby CW(Forward) CCW(Reverse) FAST DECAY(output OFF) SLOW DECAY(brake)
Charge pump circuit Stop
L OFF L
Operating
*: Don't care Note: When the sensing resistor is connected to SEN 3 and 4 pins, the constant-current drive through chopping is made for the set current. Connection of SEN3 and 4 pins to GND allows saturation drive.
No.A0004-22/29
LV8042LG
Output Stage Transistor Function
VM VM VM
ON U1 OUTA L1 OFF
OFF U2 OUTB L2 ON
OFF U1 OUTA L1 ON
ON U2 OUTB L2 OFF
OFF U1 OUTA L1 ON
OFF U2 OUTB L2 ON
(Forward)
(Reverse)
(Brake)
3ch 4ch Reference Voltage Setting Serial Data: (D1, D0=0, 0)
D5 (VSEN2_SELECT2) 0 0 1 1 D4 (VSEN2_SELECT1) 0 1 0 1 Current setting reference voltage 0.2V 0.134V 0.1V 0.066V
Since the reference voltage is changed over for 3ch and 4ch simultaneously, individual setting cannot be made. Constant-Current Chopping Drive When the sensing resistor is connected to SEN 3 and 4 pins, the constant-current drive through chopping is made for the set current calculated from the reference voltage and SEN resistor.
PWM
Chopping current control Set current
Coil current
Set Current Value (constant current) Calculation Method IOUT = Reference voltage/SEN resistor Since the reference voltage can be made variable (0.2V, 0.134V, 0.1V, 0.066V) with the serial data, the output current can be set from the reference voltage and SEN resistor. (Example) The output current as follows flows when the reference voltage is 0.2V and SEN resistance is 1. IOUT = 0.2V/1 = 200mA
No.A0004-23/29
LV8042LG
Stepping Mode (3ch 4ch drive mode setting D7="1")
CLK Function
Input ST L H H CLK34 * Standby mode Excitation step feed Operating Excitation step hold Stop Operation mode Charge pump circuit
3ch 4ch (STP) Status Setting Serial Data: (D1, D0=1, 0)
D7(OE) * * * * * * * * * * 0 1 D6(RST) * * * * * * * * 0 1 * * D5(HOLD) * * * * * * 0 1 * * * * D4(MS2) * * 0 0 1 1 * * * * * * D3(MS1) * * 0 1 0 1 * * * * * * D2(F/R) 0 1 * * * * * * * * * * Operation mode CW (Forward) CCW (Reverse) 2 phase excitation drive 1-2 phases full torque excitation drive 1-2 phases excitation drive 4W1-2 phase excitation drive Step hold cancel Step hold Counter reset (Excitation at initial position) Counter reset cancel Output high-impedance Output operation status
*: Don't care
3ch 4ch Reference Voltage Setting Serial Data: (D1, D0=0, 0)
D5 (VSEN2_SELECT2) 0 0 1 1 D4 (VSEN2_SELECT1) 0 1 0 1 Current setting reference voltage (at 100%) 0.2V 0.134V 0.1V 0.066V
The output current setting reference voltage can be changed in four stages by the serial data. This is useful for power saving during hold power application to the motor. Set Current Value Calculation Method IOUT = (reference voltage x set current ratio) /SEN resistance Since the reference voltage can be made variable (0.2V, 0.134V, 0.1V, 0.066V) with the serial data, the output current can be set from the reference voltage and SEN resistor. (Example) The output current as shown below flows when the reference voltage is 0.2V, the set current ratio is 100%, and SEN resistance is 1. IOUT = 0.2V x 100%/1 = 200mA
No.A0004-24/29
LV8042LG
Initial Excitation Position (Monitor output position)
Excitation mode 2 phase 1-2 phases full torque 1-2 phases 4W1-2 phase 3ch 100% 100% 100% 100% 4ch -100% 0% 0% 0%
* For the monitor setting, refer to the description made for 1ch/2ch.
PWM Driven Motor Driver (5ch/6ch) 5ch (PWM) truth table: (D1, D0=1, 1)
Input ST L H H H H PWM5 * H H L L D2 * 0 1 * * D3 * * * 0 1 OUT5A OFF HNote L OFF L Output OUT5B OFF L HNote OFF L Standby CW (Forward) CCW (Reverse) FAST DECAY (output OFF) SLOW DECAY (brake) Operating Stop Operation mode Charge pump circuit
6ch (PWM) truth table: (D1, D0=1, 1)
Input ST L H H H H PWM6 * H H L L D4 * 0 1 * * D5 * * * 0 1 OUT6A OFF H
Note
Output OUT6B OFF L HNote OFF L
Operation mode Standby CW (Forward) CCW (Reverse) FAST DECAY (output OFF) SLOW DECAY (brake)
Charge pump circuit Stop
L OFF L
Operating
*: Don't care Note: Since there is no SEN pin, saturation drive is made.
No.A0004-25/29
LV8042LG
Constant-Current Forward/Reverse Motor Driver (7ch) 7ch (Constant-current) Truth Table
Input ST L H H H H IN71 * L L H H IN72 * L H L H OUT7A OFF OFF H L L Output OUT7B OFF OFF L H L Standby Output OFF CW (Forward) CCW (Reverse) Brake Operating Stop Mode Charge pump circuit
*: Don't care
VM7 OUT7A IN71 OUT7B
IN72 Variable with serial data VREF7 Reference voltage
Logic circuit
+ LIM7 -
Rapid charge circuit Rapid discharge circuit FC7
SEN7
7ch Reference Voltage (VREF7 voltage) Setting Serial Data: (D1, D0=1, 1)
D7 (VSEN7_SELECT2) 0 0 1 1 D6 (VSEN7_SELECT1) 0 1 0 1 Current setting reference voltage (VREF7 voltage) 0.2V 0.134V 0.1V 0.066V
Set Current Value Calculation Method IOUT = LIM7 voltage/SEN7 resistance Since LIM7 voltage is the external input, the reference voltage can be freely set. Since the VREF7 voltage can be made variable (0.2V, 0.134V, 0.1V, 0.066V) with the serial data, short-circuiting the VREF7 pin with the LIM7 pin enables varying the reference voltage. Input of the voltage obtained by dividing VREF7 with the resistor can produce any arbitrary reference voltage (0.2V or less).
No.A0004-26/29
LV8042LG
Recommended Application Circuit
The value at each element is the recommended one. For each input condition numerical value, confirm the previous allowable operation range. 1ch/2ch micro-step drive 3ch/4ch micro-step drive (changeover to PWM drive possible: See 5ch/6ch recommended circuit) 5ch/6ch saturation drive (described separately) 7ch constant current drive
M M
(Note 2)
(Note 2)
(Note 2)
17
OUT4B
16
(NC)
15
SEN4
14
OUT4A
13
VM34
12
OUT3B
11
SEN3
10
OUT3A
9
(NC)
8
OUT2B
7
SEN2
6
OUT2A
5
VM12
4
OUT1B
3
SEN1
(Note 2)
1
1
1
1
2
OUT1A
1
(NC)
18 (NC) 19 (NC) 3.3V CLK 0V 20 PGND34 21 PWM3/CLK34 22 PWM4 23 (NC) 3.3V 24 ST 0V 25 (NC) (Note 1) 26 GND 27 DATA Serial data 3.3V -+ 28 STB 29 SCLK 30 VCC + 0.1F 20k 31 (NC) 32 R 33 PWM5
PGND56 PGND7 OUT5A OUT5B OUT6A OUT6B OUT7A OUT7B
PGND12 68 CLK12 67 MO 66 IN72 65 IN71 64 (NC) 63 VREF7 62 (Note 3) (NC) 61 3.3V CLK 0V 3.3V 0V 3.3V 0V
LV8042LG
LIM7 60 (NC) 59 FC7 58 VGH 57 CPH2 56 (NC) 55 CPH1 54 VGL 53 CPL2 52
(NC) VM7 CPL1
0.001F
+
-
0.1F 0.1F
+
-
34 PWM6
(NC)
0.1F 0.1F
VM56
35
36
37
38
39
40
41
42
43
44
45
46
47
SEN7
(NC)
(NC)
(NC)
48
49
50
51
The circuit diagram enclosed with broken line is shown separately.
1
+
5V
-
+
10F
(NC): No Connect ILV00206
Note 1: GND wiring should be made with one-point grounding as much as possible. Note 2: A 1 resistor is attached for each of the SEN pin registers. This sets an output of 200mA when the current ratio is 100%. Note 3: Set the LIM7 reference voltage by short-circuiting VREF7 (or dividing with resistance) before input or by applying the voltage from the outside.
No.A0004-27/29
LV8042LG
5ch/6ch Recommended Circuit For 5ch/6ch, STM and DCM (VCM) can be driven by using two H-bridge circuits. (For 3ch/4ch, the following application is possible when the mode is set to the PWM drive mode.) Application (1) STM
3.3V Pulse 0V 3.3V Pulse 0V 33 PWM5
PGND56 OUT5A OUT5B OUT6A OUT6B
34 PWM6
(NC)
VM56
(NC)
(NC)
35
36
37
38
39
40
41
42
(NC)
43
44
(Note 4)
M
ILV00207
Note 4: To drive STM, serial data must be input for each excitation (phase changeover) Application (2) DCM (Double output capacity)
3.3V PWM 0V 33 PWM5
PGND56
34 PWM6
OUT5A OUT5B OUT6A VM56 (NC) (NC) (NC) (NC)
35 (Note 5)
36
37
38
39
40
41
42
43
44
M
ILV00208
Note 5: Short-circuit each input/output. (When short-circuiting, be sure to connect OUT5A and OUT6A, OUT5B and OUT6B correctly.) Application (3) VCM
3.3V 0V 3.3V 0V 33 PWM5
PGND56
43
OUT5A
OUT5B
OUT6A
35
36
37
38
39
40
41
42
44
ILV00209
OUT6B
34 PWM6
VM56
(NC)
(NC)
(NC)
(NC)
OUT6B
No.A0004-28/29
LV8042LG
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of April, 2007. Specifications and information herein are subject to change without notice.
PS No.A0004-29/29


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